Alex Wong
Published

Logic Analyzer Project from Digilent Design Contest

Logic Analyzer is a project which can help students and engineers to verify digital hardware, digital communication or software integration.

IntermediateFull instructions provided10 hours103
Logic Analyzer Project from Digilent Design Contest

Things used in this project

Hardware components

Pmod RS232
Digilent Pmod RS232
×1
Cmod A7
Digilent Cmod A7
×1

Software apps and online services

LabVIEW Home Bundle
LabVIEW Home Bundle
Vivado Design Suite
Xilinx Vivado Design Suite
ISE Design Suite 14.7

Story

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Schematics

Video Demonstration

Project Presentation

Project Documentation

Credits

Daniel Titirez, Adrian Adochitei & Eduard Marian Roca

Posted by Alex Wong

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